Electrically writable and rewritable EEPROMs find a wide range of applications because of their capabilities of on-board rewrite and rewrite in units of page and byte. Therefore, the EEPROMs require a highly reliable design and microminiaturization.
For improvement of the reliability, a FLASH is proposed, which includes a storage cell and an additional verify cell for single data so that data write and erasure can be easily verified (see Patent Document 1). A conceivable approach to the highly reliable design of the EEPROM is to employ a dual cell system adapted to store the same data in two cells.    Patent Document 1: JP-A-HEI8 (1996)-180696